Printed Circuit Boards

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Printed circuit board design/fabrication

Overview

Software Design

See Software Design Tools.

Step by Step by using Software Design Tool

  • make sure the dimension and shape of PCB
  • make sure the size and location of Via for PCB stand
  • Make sure each components footprint.
  • each components are placed on suitable place by put on a hardcopy of simulation PCB
  • All components get enough clearance between them.
  • Silkscreen layout is confirmed.
  • PCB is drawn.
  • silkscreen adding the following:
    • version no.
    • organization name
    • board name
  • Netlist is ran and got a no error result.
  • DRC is ran and got a no error result.
  • Overall is checked.
  • generate Gerber and send to PCB Manufacturers.

Manual Design

Some people do PCB layout on clear film or by directly drawing on a circuit board, of even by scratching, grinding.... For now let them google this.

Homebrew fabrication

Before exploring these techniques, you should understand your options with regard to services such as BatchPCB.com, ExpressPCB.com and PCB123.com. Being able to have several boards fabbed in 2 days for $59 (for example) makes it harder to justify the hassle of etching your own boards at home.

Commercial PCB fabrication

Best Practices for PCB Layout

Theory

  • Provide the easiest path (lowest impedance) for current to flow
    • Return current tends to flow directly under signal trace (for PCB having ground plane)
    • Inductance increases with length of traces
    • Inductance increases with the area enclosed by signal trace and ground
  • Prevent digital currents from contaminating analog currents
  • Decouple high speed components
  • Use ground loop avoidance techniques

Layer stack-up

1-layer, 2-layer, and 4-layer boards all have their advantages and disadvantages.


Many people recommend going to 4-layer boards when using high-speed digital logic, since that allows a solid ground plane that improves EMI/EMC. See: Nansen Chen, Hongchin Lin. "A Two-Layer Board Intellectual Property to Reduce Electromagnetic Radiation". They manage to directly connect a DDR SDRAM in a 66-pin TSOP package to a digital LCD-TV controller, both on the top layer of a 2-layer PCB, with the DRAM CLOCK operating at about 250 Mbit/s and the DRAM DQ operating at about 500 Mbit/s (DDR), the Addr/CMD at about 125 Mbit/s, playing 1080i video with picture in picture display. Of the two very similar PCB layouts they present, the one where the bottom layer to be a solid ground layer under *all* the DRAM data and clock lines produced significantly less EMI.

Design

  • Partition PCB into "analog stuff" and "digital stuff".
  • No digital signal traces should cross over analog ground, and vice versa
  • For components having both analog and digital signals (e.g. ADC), orientate components so that the analog signal traces goes only over the analog ground plane, and digital signal traces goes only over the digital ground plane
  • AGND and DGND of ADC must have a small impedance (i.e. separated by short distance)
  • Add decoupling capacitors close to Vcc and DGND of ICs
  • Add ferrite beads and capacitors (PI-filter) to power rail for low-pass filtering (reduce ripples).

Routing

  • Place fixed components first (components location that cannot be changed, e.g. connectors, buttons, etc)
  • Make installing parts onto the PCB fast:
  • Separate components into groups
    • Digital signals only
    • Analog signals only
    • Digital and analog (Mixed) signals
    • High current devices (e.g. led backlight for LCD/buzzer)
  • Do not partition ground into analog and digital planes.
  • Orientate components that have mixed signals according to the orientation of the ground planes, and straddle components over DGND and AGND
  • Place digital only components over DGND
  • Place analog only components over AGND
Grounding Example for PCB
  • Decoupling capacitors should be as close to the ICs as possible
              Vcc
               | | | | |
             +-----------+
 -------+-+--|-+---------|-------- Vcc
        |C|  |    IC     |
 -------+-+--|---------+-|-------- GND
             +-----------+
               | | | | |
                       GND
  • Lay critical (noise-sensitive) traces first (e.g. crystal, analog signals)
    • As short as possible
    • Use 45o turnings instead of 90o
  • Paired signal traces (e.g. TX+, TX- in ethernet chips) should run parallel along each other
    TX+ -----\
    TX- ----\ \
             \ \
              \ \
               \ \
                \ \------------ TX+
                 \------------- TX-

References

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