Difference between revisions of "Modulation Plugin"
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− | == | + | ==ToDo== |
− | * | + | *"Lo" time of DAC can also be set |
− | * | + | *modulation cct & PCb |
− | * | + | **Bias resistors for op-amp |
− | * | + | **crystal & SMD res. too close, easy to short when soldering |
− | * | + | **footprint of some chips are too small, enlarge it for easily soldering |
− | * | + | **some cct modification |
+ | ***modify the res. value | ||
Line 11: | Line 12: | ||
*The modulation module is used to deliver a digital output signal with the following characteristics: | *The modulation module is used to deliver a digital output signal with the following characteristics: | ||
**Square wave | **Square wave | ||
− | **Variable frequency ( | + | **Variable frequency (0 - 10MHz) |
**Variable amplitude (0V - 2.5V) | **Variable amplitude (0V - 2.5V) | ||
*interface to MCU which do the control | *interface to MCU which do the control | ||
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==Software Solution== | ==Software Solution== | ||
− | *Timer Interrupt controlling I2C | + | *Timer Interrupt controlling I2C DAC can only achieve frequency response of about 500Hz |
**5byte/cmd | **5byte/cmd | ||
**8bit/byte | **8bit/byte | ||
Line 28: | Line 24: | ||
**This yields 10kHz (0.1ms) | **This yields 10kHz (0.1ms) | ||
**As OS context switch is 10ms, set timer to 1ms (1kHz), so that 0.9ms can be used to process other tasks | **As OS context switch is 10ms, set timer to 1ms (1kHz), so that 0.9ms can be used to process other tasks | ||
+ | **timer frequency of 1kHz yields a modulation frequency of 500Hz | ||
*Due to higher freq. response requirement, so using hardware to implement the clock | *Due to higher freq. response requirement, so using hardware to implement the clock | ||
Line 34: | Line 31: | ||
===Overall Performance=== | ===Overall Performance=== | ||
− | *I2C Baudrate: | + | *I2C Baudrate: 400kHz |
− | *Output Voltage Range: | + | *Output Voltage Range: 0 - 3.3V |
− | *Output Frequency Range: | + | *Output Frequency Range: 0 - 10MHz |
− | *Number of channels: | + | *Number of channels: 4 |
Line 43: | Line 40: | ||
{|border="1" cellspacing="0" cellpadding="5" | {|border="1" cellspacing="0" cellpadding="5" | ||
|+ | |+ | ||
− | ! Part No. !! Description | + | ! Part No. !! Description |
|-valign="top" | |-valign="top" | ||
− | | [http://focus.ti.com/lit/ds/symlink/ | + | | [http://focus.ti.com/lit/ds/symlink/dac7574.pdf DAC7574IDGS] || Quad-channel 12-bit I2C DAC |
|-valign="top" | |-valign="top" | ||
− | | [http:// | + | | [http://ww1.microchip.com/downloads/en/DeviceDoc/70165E.pdf dsPIC33FJ256GP506-I/PT] || uP programed as I2C Quad-channel programmable clock[*] |
|-valign="top" | |-valign="top" | ||
− | | [http:// | + | | [http://focus.ti.com/lit/ds/symlink/sn74ahc4066.pdf SN74AHC4066PWR] || Quad-channel Bilateral Analog Switch |
|-valign="top" | |-valign="top" | ||
− | | [http:// | + | | [http://focus.ti.com/lit/ds/symlink/opa4340.pdf OPA4340EA] || Single-Supply, Quad-channel, Rail-to-Rail Operational Amplifiers |
|} | |} | ||
− | + | *[*]Alternatives: [http://www.maxim-ic.com/quick_view2.cfm/qv_pk/4474 DS1089L]: 3.3V Center Spread-Spectrum EconOscillator | |
Line 70: | Line 67: | ||
− | This architecture allows the square wave to run at a very high frequency, even with a slow I2C and a slow DAC. | + | *This architecture allows the square wave to run at a very high frequency, even with a slow I2C and a slow DAC. |
Line 101: | Line 98: | ||
w 272 128 336 128 0 | w 272 128 336 128 0 | ||
w 176 256 176 144 0 | w 176 256 176 144 0 | ||
− | r 272 224 272 288 0 | + | r 272 224 272 288 0 10000.0 |
w 272 128 272 224 0 | w 272 128 272 224 0 | ||
w 272 288 272 352 0 | w 272 288 272 352 0 | ||
159 144 128 208 128 0 | 159 144 128 208 128 0 | ||
− | r 208 128 256 128 0 | + | r 208 128 256 128 0 10000.0 |
w 256 128 272 128 0 | w 256 128 272 128 0 | ||
w 144 256 176 256 0 | w 144 256 176 256 0 | ||
− | r 336 224 336 288 0 | + | r 336 224 336 288 0 10000.0 |
g 336 352 336 368 0 | g 336 352 336 368 0 | ||
w 336 288 336 352 0 | w 336 288 336 352 0 | ||
w 336 192 336 224 0 | w 336 192 336 224 0 | ||
− | r 352 192 432 192 0 | + | r 352 192 432 192 0 10000.0 |
− | o 4 64 0 34 2.5 | + | o 4 64 0 34 2.5 9.765625E-5 0 -1 |
o 0 64 0 35 5.0 9.765625E-5 1 -1 | o 0 64 0 35 5.0 9.765625E-5 1 -1 | ||
− | o 11 64 0 34 2.5 | + | o 11 64 0 34 2.5 3.90625E-4 2 -1 |
</nowiki></pre> | </nowiki></pre> | ||
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− | [http:// | + | ===[http://chungyan5.no-ip.org/vc/?root=modulation_plugin SVN Server]=== |
+ | *Repository: svn+ssh://chungyan5.no-ip.org/home/open_data/electronic_computer/modulation_plugin/svn_rep | ||
+ | *Contains circuit PCB and software for dsPic Programmable Clock |
Revision as of 01:30, 8 December 2008
Contents
ToDo
- "Lo" time of DAC can also be set
- modulation cct & PCb
- Bias resistors for op-amp
- crystal & SMD res. too close, easy to short when soldering
- footprint of some chips are too small, enlarge it for easily soldering
- some cct modification
- modify the res. value
Objectives
- The modulation module is used to deliver a digital output signal with the following characteristics:
- Square wave
- Variable frequency (0 - 10MHz)
- Variable amplitude (0V - 2.5V)
- interface to MCU which do the control
Software Solution
- Timer Interrupt controlling I2C DAC can only achieve frequency response of about 500Hz
- 5byte/cmd
- 8bit/byte
- baudrate = 400kHz
- This yields 10kHz (0.1ms)
- As OS context switch is 10ms, set timer to 1ms (1kHz), so that 0.9ms can be used to process other tasks
- timer frequency of 1kHz yields a modulation frequency of 500Hz
- Due to higher freq. response requirement, so using hardware to implement the clock
Hardware Solution
Overall Performance
- I2C Baudrate: 400kHz
- Output Voltage Range: 0 - 3.3V
- Output Frequency Range: 0 - 10MHz
- Number of channels: 4
Selected Chips
Part No. | Description |
---|---|
DAC7574IDGS | Quad-channel 12-bit I2C DAC |
dsPIC33FJ256GP506-I/PT | uP programed as I2C Quad-channel programmable clock[*] |
SN74AHC4066PWR | Quad-channel Bilateral Analog Switch |
OPA4340EA | Single-Supply, Quad-channel, Rail-to-Rail Operational Amplifiers |
- [*]Alternatives: DS1089L: 3.3V Center Spread-Spectrum EconOscillator
Circuit
+-----+ +--------+ +--------+ I2C Bus | | | Analog | | Op-Amp | ------------+-----| DAC |------------| Switch |---------| |---------Output | | | +--------+ +--------+ | +-----+ | | | | +--------------+ | | | Programmable | | +-----| Clock |-------+ +--------------+
- This architecture allows the square wave to run at a very high frequency, even with a slow I2C and a slow DAC.
Circuit Simulation by Paul Falstad's Web
- Import the following
$ 1 5.0E-6 16.817414165184545 64 5.0 50 w 128 256 144 256 0 w 16 256 64 256 0 g 16 352 16 368 0 v 64 64 112 64 0 0 40.0 2.5 0.0 0.0 0.5 w 112 128 144 128 0 w 64 128 16 128 0 w 16 128 16 256 0 v 64 256 128 256 0 2 1000.0 1.65 1.65 0.0 0.5 a 336 144 464 144 1 3.3 0.0 w 336 160 336 192 0 w 464 192 464 144 0 w 464 144 512 144 0 r 592 144 592 256 0 1000.0 g 592 352 592 368 0 w 512 144 592 144 0 w 336 192 352 192 0 w 432 192 464 192 0 v 64 128 112 128 0 1 1.0 1.25 1.25 0.0 0.5 w 16 256 16 288 0 w 16 288 16 352 0 w 592 256 592 352 0 g 272 352 272 368 0 w 272 128 336 128 0 w 176 256 176 144 0 r 272 224 272 288 0 10000.0 w 272 128 272 224 0 w 272 288 272 352 0 159 144 128 208 128 0 r 208 128 256 128 0 10000.0 w 256 128 272 128 0 w 144 256 176 256 0 r 336 224 336 288 0 10000.0 g 336 352 336 368 0 w 336 288 336 352 0 w 336 192 336 224 0 r 352 192 432 192 0 10000.0 o 4 64 0 34 2.5 9.765625E-5 0 -1 o 0 64 0 35 5.0 9.765625E-5 1 -1 o 11 64 0 34 2.5 3.90625E-4 2 -1
SVN Server
- Repository: svn+ssh://chungyan5.no-ip.org/home/open_data/electronic_computer/modulation_plugin/svn_rep
- Contains circuit PCB and software for dsPic Programmable Clock