Difference between revisions of "User talk:Seekic"
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--[[User:Chazegh|Chazegh]] 13:42, 16 July 2008 (PDT) | --[[User:Chazegh|Chazegh]] 13:42, 16 July 2008 (PDT) | ||
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| + | == IC electronic component CB55000 == | ||
| + | |||
| + | To provide information and technique literatures for the enterprise | ||
| + | like this IC electronic component CB55000 datasheet and pdf download: | ||
| + | http://www.chinaicmart.com | ||
| + | |||
| + | '''1 GENERAL DESCRIPTION''' | ||
| + | |||
| + | The CB55000 standard cell series uses a high performance, low-voltage, 0.25 mm drawn (0.20 mm effective),six metal levels CMOS process HCMOS7 to a 90 pico-second internal delay while offering very low power dissipation and high noise immunity. | ||
| + | With an average routed gate density of 30,000 gates/mm2, the CB55000 family allows the integration of up to 15 million equivalent gates and is ideal for high-complexity or high-performance devices for computer, telecommunication and consumer products. | ||
| + | With a typical gate delay of 70 ps (for a 2-input NAND gate at fan-out 1), the library meets the most demanding speed requirements in telecommunication and computer application designs today. Optimized for 2.5 V operation, the library features a power consumption of less than 70 nW/Gate/MHz (fanout=1) and 30 nW/Gate/MHz (fan-out=1) at 1.8 V. | ||
| + | The I/O buffers can be fully configured for both 2.5 V and 3.3 V interface options, with several high speed buffer types available. These include: low voltage differential (LVDS) I/Os, PCI/AGP, PECLs, and HSTL. The pad pitch down to 50 mm, in a staggered arrangement, meets the requirements of high pin-count devices which tend to become pad-limited at such library densities. For very high pin-count ICs, advanced packaging solutions such as Chip Scale Packaging in fine pitch BGA are available. | ||
| + | New packaging solutions using a flip-chip approach are currently being developed. | ||
Revision as of 03:09, 22 July 2008
hi everybody.I am majored in Electronic .Now I Want to share the electronic technical knowledge, we also discuss about it .
DO you know some integrated circuit models,and how to find their datasheet and pdf ,free download.Now some friends tell me a IC platform http://www.chinaicmart.com
There are many IC models in it ,eg: LM324 LM358 NBC3111 LM317 LM339 MAX232 78L05 NE555 TL431 7805 2SK1522 P521 DS18B20 TDA2030 S8050 PC817
If you want to download MAX232 datasheet and pdf ,you can click here http://www.chinaicmart.com/series-MAX/MAX232.html more and more detail contact with me dzsc028@hotmail.com
Hi Seekic,
An increasing number of your posts are entirely commercial in nature. In one instance, I have seen you replace a page of useful information with your own commercial posting.
This Wiki can't support that kind of traffic if it is going to be a successful source of information for this site's users.
Please refrain from posting what are essentially advertisements, and never replace other people's posts with your own, especially when it is purely commercial.
--Chazegh 13:42, 16 July 2008 (PDT)
IC electronic component CB55000
To provide information and technique literatures for the enterprise like this IC electronic component CB55000 datasheet and pdf download: http://www.chinaicmart.com
1 GENERAL DESCRIPTION
The CB55000 standard cell series uses a high performance, low-voltage, 0.25 mm drawn (0.20 mm effective),six metal levels CMOS process HCMOS7 to a 90 pico-second internal delay while offering very low power dissipation and high noise immunity. With an average routed gate density of 30,000 gates/mm2, the CB55000 family allows the integration of up to 15 million equivalent gates and is ideal for high-complexity or high-performance devices for computer, telecommunication and consumer products. With a typical gate delay of 70 ps (for a 2-input NAND gate at fan-out 1), the library meets the most demanding speed requirements in telecommunication and computer application designs today. Optimized for 2.5 V operation, the library features a power consumption of less than 70 nW/Gate/MHz (fanout=1) and 30 nW/Gate/MHz (fan-out=1) at 1.8 V. The I/O buffers can be fully configured for both 2.5 V and 3.3 V interface options, with several high speed buffer types available. These include: low voltage differential (LVDS) I/Os, PCI/AGP, PECLs, and HSTL. The pad pitch down to 50 mm, in a staggered arrangement, meets the requirements of high pin-count devices which tend to become pad-limited at such library densities. For very high pin-count ICs, advanced packaging solutions such as Chip Scale Packaging in fine pitch BGA are available. New packaging solutions using a flip-chip approach are currently being developed.
